Senior Allegro PCB Layout Design Engineer
Interface Masters Technologies, Inc.
Mô tả công việc
• Design, develop, and optimize high-speed, high-density PCB layouts using Cadence Allegro and OrCAD. • Collaborate closely with hardware, SI/PI, mechanical, and system engineers to define layout requirements and design constraints. • Support and incorporate Signal Integrity (SI) and Power Integrity (PI) analysis to ensure robust electrical performance. • Implement advanced layout techniques for DDR4 and 50G SERDES high-speed interfaces. • Ensure compliance with EMC/EMI, manufacturability (DFM), and reliability standards throughout the design process. • Review, validate, and maintain design documentation, ensuring accuracy and adherence to internal and industry standards. • Identify, troubleshoot, and resolve complex layout and performance issues from concept through production. • Provide technical leadership and mentorship to junior PCB layout engineers, promoting best practices and design excellence.
Yêu cầu công việc
• 7+ years of hands-on experience in PCB layout design using Cadence Allegro and OrCAD. • Strong expertise in high-speed PCB design, including Signal Integrity (SI) and Power Integrity (PI) principles. • Proven experience with DDR4 memory layout and 50G SERDES high-speed interfaces. • Solid understanding of EMC/EMI mitigation techniques, grounding, and shielding. • Experience with thermal considerations and collaboration with mechanical teams is a plus. • Excellent analytical and problem-solving skills, with strong attention to detail and design quality. • Ability to work effectively in a cross-functional, global engineering environment. • Good communication skills in English (written and verbal). • Experience in telecom, networking, or cybersecurity industries is preferred.
Quyền lợi
Health insurance , Generous paid time off , Wellness programs , Retirement plans. Flexible work arrangements